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Showing posts with label TSMC. Show all posts
Showing posts with label TSMC. Show all posts

Thursday, April 23, 2015

A Defining Inflection in the EUV Continuum


https://www.youtube.com/watch?v=vIiqAcGr614An April 22, 2015 ASML press release [1] announced an agreement with one of its major US customers (believed to be Intel) to purchase a minimum quantity of fifteen of its NXE:3350B EUV lithography systems with two of the units slated for delivery year end 2015. Intel has previously invested over $4 Billion in ASML. Given the size of the order, it would appear that Intel will proceed with a large scale strategic commitment to EUV lithography for future production process nodes =<10nm, with a path to 7nm and smaller CDs.

Although financial details of the purchase were not released, a sizable capital equipment expenditure has been made after many years of delay and uncertainty in the EUV program. This purchase transaction represents a large scale, high profile commitment to what has been a capital intensive development program delayed by uncooperative laws of physics, semiconductor sector business cycles, and capital market dynamics. It seems that the semiconductor production road map has been sufficiently refined, concomitant with related process technologies, and that confidence has been restored in long term EUV/HVM convergence/insertion forecasting. Although Intel's eventual commitment to production EUV had been anticipated, the waiting game is over. The remaining field of industry players who have withheld their commitments to EUV might now be motivated to secure anticipated purchase positioning with ASML before delivery date extensions become a concern.

SPIE Advanced Lithography 2015 was likely a key catalyst triggering this defining inflection point as process experts from around the globe converged to announce new and encouraging breakthroughs in lithography and related technologies which have heretofore gated the EUV program. We might review some of the important observations and breakthroughs which comprise the critical mass of the inflection:


EUV Inflection Triggers
Probable Key Factors in Intel's EUV Decision

- While lithographers have entertained DSA and electron beam lithography as developmental candidates for 7nm scaling, given current evolution, only 13.5nm stepper/scanners can provide the image resolution and throughput required for both pilot line and future HVM.

- SEMATECH recently announced the development of a metal oxide based photoresist which reduces the EUV power output required for EUVL dosimetry (typically 15 – 20 mJ/cm2) to less than 2 - 3 mJ/cm2. [2] The new resist enables process development at reduced EUV power levels, but will not eliminate the future requirement for higher HVM source power. In the interim, it's possible that process solutions can be built around this low dose resist, enabling further, accelerated development of EUV HVM.

- During SPIE Advanced Lithography on February 24, ASML announced TSMC's confirmation that it had processed 1022 wafers in twenty four hours [3] on its NXE:3300B with a sustained source power of 90 watts. There is encouraging new data illustrating improved MTBF while sustaining EUV source operation at higher power levels.

- ASML has made significant over all progress in EUV development and has recently updated its time line for implementation of key milestones. ASML released many new updates on their EUV program at SPIE Advanced Lithography 2015 which were quite voluminous (see the post conference SPIE abstract summary).

- Obstacles to 7nm and future nodes have been addressed. ASML and Carl Zeiss acknowledged in an invited paper at SPIE Advanced Lithography 2015, that higher resolutions will require 60mJ/cm2 for half pitch nodes <8nm. [4] ASML's work with Carl Zeiss has produced an optical system with a numeric aperture (NA) of 0.55 vs. ASML's current EUV NA of 0.33. The higher NA system will require 500 watts of EUV power to achieve the estimated 60 mJ/cm2 dosimetry required for throughput of 150 wafers/hour. While this ASML/Carl Zeiss achievement paves the way for =<7nm process nodes, current R&D programs are also under way to provide a visible path to a >500 watt free electron laser EUV source, identifying one of the last major puzzle pieces in ASML's EUV endeavor. While ASML continues to refine Laser Produced Plasma source technology, the future availability of a >500 watt free electron laser EUV source remains a critical item on the agenda, and will probably gate the time lines of related programs.

- ASML has entered the pellicle business in the self interest of providing viable protection for EUV photomasks from particulate contamination. The polysilicon based pellicles are transparent to EUV with a one pass transmission loss approximating 14% and seem to exhibit sufficient durability for use in production. Previous uncertainty in EUV pellicle viability and availability have been resolved.

- As a key semiconductor industry supplier, Veeco Instruments has been successful in providing ion beam deposition tooling enabling EUV mask fabrication for advanced process nodes within acceptable defect limits. Defect free mask fabrication for advanced nodes has been a gating factor in the EUV program.

- Advancements in actinic inspection are progressing. Lawrence Berkeley National Laboratory's CXRO has been developing the SHARP EUV microscope in cooperation with SEMATECH . [5] A progress report on mask inspection was made at SPIE Advanced Lithography 2015. The SHARP EUV microscope is illuminated by an EUV synchrotron light source within the CXRO complex. The commercial availability of EUV obtained from free electron laser technology could enable the emulation of SHARP's capabilities given comparable optical and analytical performance.

- Future commercial availability of free electron laser EUV sources could also offset concerns gating the development of actinic inspection tools by KLA-Tencor and others. Given proper design, it's possible that a single free electron source beamline could provide EUV source illumination for both stepper/scanner clusters and in-line actinic inspection tools.

- Recent successes at TSMC with ASML's NXE:3300B EUV systems have prompted an additional order for two newer model NXE:3350B tools. As foundry commitments to EUV lithography continue, Intel has taken a major strategic step to ensure its competitive leadership positioning in the global wafer fabrication market.


No doubt there were many other considerations factored into Intel's EUV purchase decision. Ultimately the achievement and convergence of key process and equipment performance concerns have prompted a major commitment to both lithography and investment strategy over the longer term. In doing so, Intel has set a defining course for the semiconductor industry.


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Thomas D. Jay
Semiconductor Industry Consultant

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Corporate, private entities or publications referenced or linked in this article are the respective owners of their logos, trademarks, service marks, media content and intellectual property.  Unless otherwise disclosed, Thomas D. Jay has no financial interest in companies referenced in blog articles or other published media communications. No representation is made to either buy or sell securities. Opinions expressed by Thomas D. Jay are his own. Thomas D. Jay does not employ or otherwise utilize/authorize third party agents to express his opinions, represent his interests or conduct business on his behalf except where formally contractually designated.

Acknowledgements and Reference Links

[1] ASML press release 

Thursday, January 24, 2013

The Scrum of All Fears


If you assemble the leadership of the world's largest semiconductor manufacturers, confront them with the critical tasks required to ensure on time development and delivery of EUV photolithography, what you'll get is the scrum of their fears.

On February 24-28 in San Jose, CA, the world's experts in the field of semiconductor photolithography will meet at the SPIE 2013 Advanced Lithography IV conference to present papers and report on the current development of 13.5 nanometer EUV (Extreme Ultra Violet) light source technology. Although significant progress has been made, the remaining tasks are formidable.  Development activity continues to secure viable production worthy EUV lithography tooling for 14 and 10 nanometer scale devices on 450mm wafers. The scrum masters are afoot and if you're attending the SPIE conference in February, chances are you might be one of them.

Scrum? For the uninitiated, the term scrum as applied to product development was first referred to in the Harvard Business Review 86116: 137–146, 1986. Scrum is a management technique which emulates the activities on a rugby football field where team members repeatedly pass the ball forward to advance toward the goal.  I won't elaborate further on scrum management here (see the referenced Harvard Business Review link below) other than to say it is probable many of us have been practicing elements of this technique for many years (unaware of it's current celebrity). While Director of Marketing at Veeco Instruments I scheduled daily early morning meetings with my staff (usually no more than ten minutes in length) to ensure current project goals were on target, tasks transitioned efficiently among managers, and obstacles were effectively circumvented. It seems to me that the semiconductor industry's management of the EUV photolithography initiative might be compared with a scrum strategy comprised of many teams reinforcing an international R&D effort. Billions of dollars are being strategically allocated by the world's largest semiconductor companies in a concerted effort to drive a program critical to all concerned. I couldn't resist the analogy to current developments in our industry and linkage to the tone of a Tom Clancy novel. Hence, the title of this essay.

Late last week I received comments on my blog questioning the efficiency with which EUV source development was progressing and how possible business/political influences might be favoring underperforming EUV R&D participants. Politics in the semiconductor industry? By now most are aware of the significant investments being made in ASML by Intel, Samsung and TSMC. Some may question the necessity for the investment. With ASML having almost twice the market capitalization of Applied Materials (ASML $29.31B, AMAT $15.22B on 1/23/2013) why was it necessary for three of the world's largest semiconductor manufacturers to invest additional billions in ASML? A review of the investments are in order: (Source: Bloomberg News)
  • Intel agreed on July 9, 2012 to purchase a 10% stake in ASML for $2.1B and later purchase another 5% for $1.0B. Additionally Intel will pay another $1.0B in scheduled payments to ensure the expeditious delivery of critical equipment to be purchased. 
  • TSMC on August 5, 2012 agreed to purchase a 5% stake in ASML for $1.38B
  • Samsung on August 27, 2012 agreed to buy a 3% stake in ASML for $974M.
  • ASML on October 17, 2012 agreed to purchase Cymer for $2.6B. Scrum reset and goal to go.
For a combined $6B investment, Intel, TSMC and Samsung will collectively own approximately 23% of ASML facilitating ASML's purchase of Cymer for another $2.6B This affords the following benefits to the investor/players:
  • The strategic capital investment will sustain ASML/Cymer focus on EUV R&D in a difficult economy.
  • Sustains the ASML/Cymer EUV program in light of concurrent R&D by imec and Xtreme Technologies/Ushio and Gigaphoton, resetting a best of breed competition.
  • Focused EUV funding will help assure uninterrupted continuance of ASML/Cymer's existing 193 nanometer lithography product lines, negating possible resource concerns.
  • The investments should accelerate the delivery of ASML/Cymer EUV lithography systems by approximately 2 years.
  • The additional capital could fund ASML/Cymer development of alternative EUV source technologies, modifications to current designs, or the acquisition of external Intellectual Property as required.
  • Expedites the concurrent development of associated/complementary EUV technologies and accelerates, offsets and distributes the cost of transition to 450mm wafers.
  • Intel, TSMC and Samsung could establish rights to Intellectual Property developed by ASML/Cymer reducing future costs.
  • Provides investor/customer companies with priority shipment slots for ASML EUV systems.
  • Could vest Intel, TSMC and Samsung with influence over future ASML/Cymer activities. 
  • Could enable ASML/Cymer to expand currently planned manufacturing capacity.
  • Could provide tax and/or investment savings for Intel, TSMC and Samsung.

Observations:
Xtreme Technologies/Ushio has demonstrated a viable hybrid EUV source utilizing rotating Sn disks as a feed/source while providing effective mitigation of Tin debris which can contaminate the EUV source optics. It is reported that the current EUV power output is 74 watts and MTBF numbers look favorable at this time. A path to higher EUV power output has been identified.

Gigaphoton has developed a proprietary pre-pulse laser technology with a CE (energy Conversion Efficiency) said to reach 5.2%. Is the recently announced Cymer pre-pulsed laser technology unique to ASML/Cymer, or is the technology licensed from Gigaphoton? Updated 2/20/2013 to note that Cymer was most recently granted patent(s) for laser pre-pulse technology on 4/17/2012 related to co-pending U.S. patent application 11/358,988 filed on 2/21/2006 entitled LASER PRODUCED PLASMA EUV LIGHT SOURCE WITH PRE-PULSE.  

Why are the interests of Intel, TSMC and Samsung specific to ASML and Cymer? Why was there no additional investment from this group in Xtreme Technologies/Ushio or Gigaphoton?  I suspect because there is confidence in the reported success of the Xtreme Technologies/Ushio EUV source installed in an ASML NXE:3100 series system at imec's 300mm fab in Leuven, Belgium. Gigaphoton has also demonstrated significant progress in its EUV source development and was the first to adapt laser pre-pulse technology to enhance EUV power output.

It seems that ASML and Cymer were viewed as being behind in the power curve (literally). However, in consideration of ASML's critical mass in the market place, it was recognized that the best economy of scale could be obtained by resolving Cymer's EUV source issues and tapping ASML's ability to ramp production when required. Cymer recently announced its own laser pre-pulse technology and appears to be recovering lost time. I suspect that Intel, TSMC and Samsung reacted to the stalled timetable at ASML and took steps to restore competitive EUV development there. The entire field of EUV technology vendors will undergo a review at SPIE Advanced Lithography IV and may prompt additional future maneuvering by Intel, TSMC and Samsung.        

For many semiconductor equipment manufacturers, escalating single unit system prices are beginning to reflect a significant fractional percentage of their market capitalization. Example: ASML's current market cap is $29.31B. The current single unit price quoted for its EUV lithography system is $125M, which represents slightly less than half of 1% (0.00426) of ASML's market cap. A full production floor of EUV systems at ASML's new manufacturing facility (accommodating 8 EUV systems totaling $1.0B) represents approximately 4% of its market cap. While ASML's costs may be under control, if your company is valued at one billion dollars in market capitalization, can it afford to develop and support products with a $125M price tag? In today's semiconductor industry economy, strategic partnerships among capital investors, manufacturing consortiums and customers are becoming the norm, providing cost offsets and economies of scale that can sustain the viability of a capital intensive business model. As equipment costs spiral upward, DSA (Directed Self Assembly) techniques for nano-structures are gaining popularity as a possible means of off setting EUV lithography and complementary tooling costs.

It would appear that ASML and Cymer are playing catch up and making progress. Cymer had fallen behind in EUV laser source development while Xtreme Technologies/Ushio and Gigaphoton were making measured power output progress. A best of breed competition was stalling and required a reset. All things considered, the strategic time line for successful production worthy 450mm EUV lithography was in need of an insurance policy, and in the spirit of the capital markets, an additional reinsurance policy (the "insurance policies" being the recent investments made by Intel, TSMC and Samsung). Enter project managers and scrum masters from Intel, TSMC and Samsung. Strategic investments were made to ensure the timely availability of EUV technology and to establish the means by which future remedial assistance to strategic partners might be efficiently managed and financed. As I commented in a previous blog posting on January 5, “Research and development in self assembling semiconductor devices hold promise for the future. In the shorter term we are witnessing the evolution and self assembly of the next generation semiconductor industry.”

As for politics in the semiconductor industry, if you're planning to attend one of the luncheons during the SPIE Advanced Lithography IV conference, dim scrum won't be found on the menu.

Thomas D. Jay
Semiconductor Industry Consultant


For additional information on the SPIE Advanced Lithography 2013 Extreme Ultraviolet Lithography IV program click on the link below:
http://spie.org/app/program/index.cfm?fuseaction=conferencedetail&export_id=x12540&ID=x10947&redir=x10947.xml&conference_id=1039349&event_id=996835

For additional information on scrum management:
http://hbr.org/product/new-new-product-development-game/an/86116-PDF-ENG

For an update on current Cymer Pre-Pulse EUV source technology:
http://www.cymer.com/pre_pulse/

For information on Xtreme Technology/Ushio EUV source technology:

For information on Gigaphoton's EUV source technology:

For a link to a photo of imec's Extreme EUV tool:

For additional information on the recent Intel, TSMC, Samsung investment in ASML, click on one of the referenced Bloomberg New links below:

http://www.bloomberg.com/news/2012-07-09/intel-agrees-to-buy-10-stake-in-asml-for-about-2-1-billion.html

http://www.bloomberg.com/news/2012-08-05/taiwan-semiconductor-agrees-to-invest-1-38-billion-in-asml.html

http://www.bloomberg.com/news/2012-10-17/asml-to-buy-cymer-for-2-55-billion-to-speed-up-euv-development.html


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